Accomplishing PROMISE, PROgrammable MIxed Signal ASIC Electronics Framework

This paper presents the activities, current results and status of the PROMISE (PROgrammable MIxed Signal Electronics) project which started at the beginning of 2020 . The project has received funding from the European Union’s Horizon 2020 research and innovation program under grant agreement No 870358. It’s tailored to bring to the space community a flexible, cost competitive mixed-signal ASIC architecture design ecosystem built on a portfolio of silicon qualified hardened IP blocks. It includes analogue IPs such as ADC, DAC, PLL, LDO, BG, LO, POR and HV MOS transistors. A digital embedded FPGA core provides a flexible programmable element and an NVM permits reconfiguration abilities without the need of using an external memory. All these elements are included on the PILOT Circuit ASIC that will be submitted to electrical validation and radiation testing as part of the qualification process of these basic elements for their future use as building blocks.

Keywords

Analogue IP Embedded FPGA Mixed Signal PROMISE ASIC ASSP Radiation hardening eFPGA Non Volatile Memory ADC DAC PLL LDO BANDGAP Local Oscillator Power On Reset

URI

http://hdl.handle.net/10400.26/58723

Citation

Luis Berrojo et al, “Accomplishing PROMISE, PROgrammable MIxed Signal ASIC Electronics Framework” 9th International Workshop on Analogue and Mixed-Signal Integrated Circuits for Space Applications, Madrid, (31 May – 3 June 2022)