Percorrer por autor "Passos, F."
A mostrar 1 - 6 de 6
Resultados por página
Opções de ordenação
- Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral ModelingPublication . Vieira, R.; Passos, F.; Póvoa, R.; Martins, R.; Horta, N.; Guilherme, J.; Lourenço, N.This work presents a study of two analog frontend circuit architectures for heartbeat detection. Both circuits present an amplification block as the first stage, followed by a band-pass filter. In the first, the heartbeat detection is done using an adaptive threshold based on pulse-width, whereas the heartbeat detection in the second is done using a sample and hold to find the maximum and minimum peak of each beating. Both architectures are modeled in Verilog-A and simulated using real-world ECG signals with different characteristics. This work studies possible fundamental analog circuit blocks suitable for wearable implementation. It evaluates critical performances requirements from the analysis of the behavior simulations. It was verified that the first circuit can properly detect heartbeats as long as the input-referred noise is below 21 μV, whereas the second one ensures it until 30 μV. The low cutoff frequency can be approximately 10 Hz without compromising the signal’s peaks, which means that these specifications can be relaxed substantially compared to systems intended to reconstruct the signal accurately.
- Layout-Aware Challenges and a Solution for the Automatic Synthesis of RadioFrequency IC BlocksPublication . Martins, R.; Lourenço, N.; Póvoa, R.; Canelas, A.; Horta, N.; Passos, F.; Castro López, R.; Roca, E.; Fernández, F.In this paper, the major methodologies proposed in the last years to speed-up the synthesis of radio-frequency integrated circuits blocks are overviewed. The challenges to automate this task are discussed, and, to avoid non-systematic iterations between circuit and layout design steps, the architecture of an innovative solution is proposed. The proposed tool exploits the full capabilities of most established computer-aided design tools available nowadays, i.e., off-the-shelf circuit simulator, electromagnetic simulator and layout extractor. The approach intends to bypass the two major bottlenecks of RF-design: the design of reliable integrated inductors and accurate layout parasitic estimates since the early stages of design process.
- New Mapping Strategies for Pre-Optimized Inductor Sets in Bottom-Up RF IC Sizing OptimizationPublication . Lourenço, N.; Martins, R.; Póvoa, R.; Canelas, A.; Horta, N.; Passos, F.; Castro López, R.; Roca, E.; Fernández, F.This paper presents new indexing and mutation operators, in the context of bottom-up hierarchical multi-objective optimization of radio frequency integrated circuits, for pre-optimized sets of solutions from the hierarchical sub-levels when moving up in hierarchy. Two ideas, one based on a Voronoi decomposition and another based on the nearest neighborhood, are explored, where, and unlike previous approaches that are based on sorting, the distance between elements determines the probability of decisions taken during optimization. Three implementations of those ideas were tried in AIDA's NSGAII evolutionary kernel, and successfully used in the optimization of a Voltage Controlled Oscillator and a Low Noise Amplifier with pre-optimized inductor sets obtained using the SIDeO toolbox, showing their strengths when compared to previous state-of-the-art mapping strategies.
- Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/ºC Temperature CoefficientPublication . Lourenço, N.; Passos, F.; Vieira, R.; Horta, N.; Guilherme, J.; Póvoa, R.This paper describes a radiation-hardened bandgap voltage reference (BGR) for space applications. The BGR has a second-order curvature compensation and can deliver a stable output voltage and current for N-type and P-type loads through internal resistors or, optionally, through an external precision resistor. The circuit includes three 8-bit trimming resistive ladders for post-fabrication calibration of the temperature compensation slope, output voltage, and output current value. The circuit is designed for reliable performance in space application, considering process, voltage, and temperature variations and the impact of single-event transients and total ionizing dose. The BGR was designed in a 180 nm silicon-oninsulator CMOS technology, using radiation-hardened devices to provide a 1.25 V reference voltage and a 20 μA current reference, and occupies a 920×430 μm2 area. After trimming, the nominal post-layout simulation over the temperature range of -40 to 125°C shows the BGR achieving a 2.7 ppm/°C temperature coefficient, 6.13 ppm/°C in the worst case.
- Sub- μW Tow-Thomas Based Biquad Filter with Improved Gain for Biomedical ApplicationsPublication . Póvoa, R.; Arya, R.; Canelas, A.; Passos, F.; Martins, R.; Lourenço, N.; Horta, N.This paper presents an innovative topology of a gm-C Operational Transconductance Amplifier (OTA), with improved gain and energy-efficiency and its corresponding implementation inside a second order Tow-Thomas based filter configuration, for biomedical and healthcare applications. The proposed OTA architecture takes advantage of a current division technique, as well as the usage of a pair of cross-coupled voltage-combiners in replacement of the static current source that traditionally bias the differential pair. The circuitry proposed in this paper is described at analytical level, fully-designed at sizing level and validated at simulation level compounded by Monte Carlo results, using a standard 130 nm technology node. Both the OTA and the biquad filter architecture are compared, in terms of performance indexes, with state-of-the-art bibliography, where the potential of both is demonstrated. The designed filter operates at weak inversion and sub-threshold, being supplied by a 0.9 V source, achieving a cut-off frequency of 15 Hz, a gain of 7 dB, hence improving the input-referred noise and consuming nearly 0.55 μW.
- Systematic Design of a Voltage Controlled Oscillator using a Layout-Aware ApproachPublication . Passos, F.; Castro Lópes, R.; Roca, E.; Fernándes, F.; Martins, R.; Lourenço, N.; Póvoa, R.; Canelas, A.; Horta, N.This paper focuses on the systematic design of voltage controlled oscillators (VCO), a commonly used radiofrequency (RF) electronic circuit. RF circuits are among the most difficult analog circuits to design due to its trade-offs and high operation frequencies. At such operation frequencies, layout parasitics and accurate passive component characterization become of upmost importance, causing re-design iterations if they are not considered by the designer. To avoid this problem, and reduce the design time, this paper presents a systematic design of a VCO, entailing layout parasitics and accurate characterization of passive components from early design stages. Results clearly illustrate the benefit of this strategy.