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New Mapping Strategies for Pre-Optimized Inductor Sets in Bottom-Up RF IC Sizing Optimization

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dc.contributor.authorLourenço, N.
dc.contributor.authorMartins, R.
dc.contributor.authorPóvoa, R.
dc.contributor.authorCanelas, A.
dc.contributor.authorHorta, N.
dc.contributor.authorPassos, F.
dc.contributor.authorCastro López, R.
dc.contributor.authorRoca, E.
dc.contributor.authorFernández, F.
dc.date.accessioned2025-02-18T16:12:57Z
dc.date.available2025-02-18T16:12:57Z
dc.date.issued2017
dc.description.abstractThis paper presents new indexing and mutation operators, in the context of bottom-up hierarchical multi-objective optimization of radio frequency integrated circuits, for pre-optimized sets of solutions from the hierarchical sub-levels when moving up in hierarchy. Two ideas, one based on a Voronoi decomposition and another based on the nearest neighborhood, are explored, where, and unlike previous approaches that are based on sorting, the distance between elements determines the probability of decisions taken during optimization. Three implementations of those ideas were tried in AIDA's NSGAII evolutionary kernel, and successfully used in the optimization of a Voltage Controlled Oscillator and a Low Noise Amplifier with pre-optimized inductor sets obtained using the SIDeO toolbox, showing their strengths when compared to previous state-of-the-art mapping strategies.pt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.citationN. Lourenço et al., "New mapping strategies for pre-optimized inductor sets in bottom-up RF IC sizing optimization," 2017 14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Giardini Naxos, Italy, 2017, pp. 1-4pt_PT
dc.identifier.doi10.1109/SMACD.2017.7981582pt_PT
dc.identifier.urihttp://hdl.handle.net/10400.26/54469
dc.language.isoengpt_PT
dc.publisherIEEEpt_PT
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/7981582pt_PT
dc.titleNew Mapping Strategies for Pre-Optimized Inductor Sets in Bottom-Up RF IC Sizing Optimizationpt_PT
dc.typeconference object
dspace.entity.typePublication
oaire.citation.endPage4pt_PT
oaire.citation.startPage1pt_PT
oaire.citation.title14th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Giardini Naxos, Italy.pt_PT
rcaap.rightsclosedAccesspt_PT
rcaap.typeconferenceObjectpt_PT

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