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Yield Optimization using K-Means Clustering Algorithm to reduce Monte Carlo Simulations

dc.contributor.authorCanelas, A.
dc.contributor.authorMartins, R.
dc.contributor.authorPóvoa, R.
dc.contributor.authorLourenço, N.
dc.contributor.authorHorta, N.
dc.date.accessioned2025-02-18T16:07:39Z
dc.date.available2025-02-18T16:07:39Z
dc.date.issued2016
dc.description.abstractThis paper presents an efficient yield optimization approach using k-means clustering algorithm to reduce Monte Carlo (MC) simulations. This approach uses a commercial electrical simulator and PDK models for evaluation purposes. The method was integrated in an analog IC design flow that includes the AIDA-C circuit sizing optimization tool. The proposed yield estimation technique reduces the number of required MC simulations during the optimization process. The simulated solutions are the most likely to populate the Pareto optimal front and result from a selection process based on a modified k-means algorithm. The proposed approach leads 75% reduction in the total number of the MC simulations for the presented case studypt_PT
dc.description.versioninfo:eu-repo/semantics/publishedVersionpt_PT
dc.identifier.doi10.1109/SMACD.2016.7520729pt_PT
dc.identifier.urihttp://hdl.handle.net/10400.26/54468
dc.language.isoengpt_PT
dc.publisherIEEEpt_PT
dc.relation.publisherversionhttps://ieeexplore.ieee.org/document/7520729pt_PT
dc.titleYield Optimization using K-Means Clustering Algorithm to reduce Monte Carlo Simulationspt_PT
dc.typeconference object
dspace.entity.typePublication
oaire.citation.endPage4pt_PT
oaire.citation.startPage1pt_PT
oaire.citation.title13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisbon, Portugal.pt_PT
rcaap.rightsclosedAccesspt_PT
rcaap.typeconferenceObjectpt_PT

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