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Browsing by Author "Vieira, R."

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  • Architectural Design for Heartbeat Detection Circuits using Verilog-A Behavioral Modeling
    Publication . Vieira, R.; Passos, F.; Póvoa, R.; Martins, R.; Horta, N.; Guilherme, J.; Lourenço, N.
    This work presents a study of two analog frontend circuit architectures for heartbeat detection. Both circuits present an amplification block as the first stage, followed by a band-pass filter. In the first, the heartbeat detection is done using an adaptive threshold based on pulse-width, whereas the heartbeat detection in the second is done using a sample and hold to find the maximum and minimum peak of each beating. Both architectures are modeled in Verilog-A and simulated using real-world ECG signals with different characteristics. This work studies possible fundamental analog circuit blocks suitable for wearable implementation. It evaluates critical performances requirements from the analysis of the behavior simulations. It was verified that the first circuit can properly detect heartbeats as long as the input-referred noise is below 21 μV, whereas the second one ensures it until 30 μV. The low cutoff frequency can be approximately 10 Hz without compromising the signal’s peaks, which means that these specifications can be relaxed substantially compared to systems intended to reconstruct the signal accurately.
    2022Conference proceedings Restricted access Show more
  • Radiation-Hardened Bandgap Voltage and Current Reference for Space Applications with 2.38 ppm/ºC Temperature Coefficient
    Publication . Lourenço, N.; Passos, F.; Vieira, R.; Horta, N.; Guilherme, J.; Póvoa, R.
    This paper describes a radiation-hardened bandgap voltage reference (BGR) for space applications. The BGR has a second-order curvature compensation and can deliver a stable output voltage and current for N-type and P-type loads through internal resistors or, optionally, through an external precision resistor. The circuit includes three 8-bit trimming resistive ladders for post-fabrication calibration of the temperature compensation slope, output voltage, and output current value. The circuit is designed for reliable performance in space application, considering process, voltage, and temperature variations and the impact of single-event transients and total ionizing dose. The BGR was designed in a 180 nm silicon-oninsulator CMOS technology, using radiation-hardened devices to provide a 1.25 V reference voltage and a 20 μA current reference, and occupies a 920×430 μm2 area. After trimming, the nominal post-layout simulation over the temperature range of -40 to 125°C shows the BGR achieving a 2.7 ppm/°C temperature coefficient, 6.13 ppm/°C in the worst case.
    2022Conference proceedings Restricted access Show more