Single Stage OTA biased by Voltage-Combiners with Enhanced Performance using Current Starving

Póvoa, R.; Lourenço, N.; Martins, R.; Canelas, A.; Horta, N.; Goes, J.

http://hdl.handle.net/10400.26/54461

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Abstract(s)

This brief presents an improved single-stage amplifier biased by voltage-combiners, through the proper usage of current starving. The topology designed and fabricated shows an enhancement of the low-frequency gain, an improvement in the establishing time due to enhanced gain-bandwidth product, and a high improvement of the energy efficiency. The circuit was optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint analog IC sizing and optimization tool, and simulation results demonstrate that a gain above 60 dB and a figure-of-merit over 900 MHz×pF/mA are acquirable with this circuit, using the UMC 130-nm technology design kit. The circuit was fabricated and experimentally measured, presenting a gain of 58 dB with a figure-of-merit of 1102 MHz×pF/mA, for a 3.3 V supply source.

URI

http://hdl.handle.net/10400.26/54461

Citation

R. Póvoa, N. Lourenço, R. Martins, A. Canelas, N. Horta and J. Goes, "Single-Stage OTA Biased by Voltage-Combiners With Enhanced Performance Using Current Starving," in IEEE Transactions on Circuits and Systems II: Express Briefs, vol. 65, no. 11, pp. 1599-1603