Publication
Multi-threaded algorithms for GPGPU in the ATLAS High Level Trigger
| dc.contributor.author | Conde Muíño, Patricia | |
| dc.date.accessioned | 2019-02-05T15:32:03Z | |
| dc.date.available | 2019-02-05T15:32:03Z | |
| dc.date.issued | 2017-11-22 | |
| dc.date.updated | 2019-02-05T15:32:03Z | |
| dc.description.abstract | General purpose Graphics Processor Units (GPGPU) are being evaluated for possible future inclusion in an upgraded ATLAS High Level Trigger farm. We have developed a demonstrator including GPGPU implementations of Inner Detector and Muon tracking and Calorimeter clustering within the ATLAS software framework. ATLAS is a general purpose particle physics experiment located on the LHC collider at CERN. The ATLAS Trigger system consists of two levels, with Level-1 implemented in hardware and the High Level Trigger implemented in software running on a farm of commodity CPU. The High Level Trigger reduces the trigger rate from the 100 kHz Level-1 acceptance rate to 1.5 kHz for recording, requiring an average per-event processing time of ∼ 250 ms for this task. The selection in the high level trigger is based on reconstructing tracks in the Inner Detector and Muon Spectrometer and clusters of energy deposited in the Calorimeter. Performing this reconstruction within the available farm resources presents a significant challenge that will increase significantly with future LHC upgrades. During the LHC data taking period starting in 2021, luminosity will reach up to three times the original design value. Luminosity will increase further to 7.5 times the design value in 2026 following LHC and ATLAS upgrades. Corresponding improvements in the speed of the reconstruction code will be needed to provide the required trigger selection power within affordable computing resources. Key factors determining the potential benefit of including GPGPU as part of the HLT processor farm are: the relative speed of the CPU and GPGPU algorithm implementations; the relative execution times of the GPGPU algorithms and serial code remaining on the CPU; the number of GPGPU required, and the relative financial cost of the selected GPGPU. We give a brief overview of the algorithms implemented and present new measurements that compare the performance of various configurations exploiting GPGPU cards. | |
| dc.description.version | Peer Reviewed | |
| dc.identifier | J.Phys.Conf.Ser. 898 (2017) 032003; DOI 10.1088/1742-6596/898/3/032003 | |
| dc.identifier.uri | http://dx.doi.org/10.1088/1742-6596/898/3/032003 | |
| dc.identifier.uri | http://hdl.handle.net/10400.26/27509 | |
| dc.language.iso | eng | |
| dc.title | Multi-threaded algorithms for GPGPU in the ATLAS High Level Trigger | |
| dc.type | journal article | |
| dspace.entity.type | Publication | |
| rcaap.rights | openAccess | pt |
| rcaap.type | article |