Póvoa, R.Canelas, A.Martins, R.Lourenço, N.Horta, N.Goes, J.2025-02-182025-02-182017R. Póvoa, A. Canelas, R. Martins, N. Lourenço, N. Horta and J. Goes, "A dynamic voltage-combiners biased OTA for low-power and high-speed SC circuits," 2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Giardini Naxos - Taormina, Italy, 2017, pp. 121-124http://hdl.handle.net/10400.26/54463his paper presents the design of a fully-dynamic voltage-combiners biased CMOS operational transconductance amplifier, for low-power high-speed analog-to-digital converters and high-performance switched-capacitor filters, using the UMC 130nm node. The biasing is controlled by switched-capacitors and simulation results of an optimized solution using AIDA-C, a state-of-the-art multi-objective multi-constraint IC optimization tool, present a DC gain of 60.9dB, a gain-bandwidth product of 155.1MHz for a 6pF load and a current consumption of 0.69mArms for a sampling clock frequency of 100MHz.engconference object10.1109/PRIME.2017.7974122